This application claims priority from Korean Patent Application 2001-5385, filed Feb. 5, 2001, the contents of which are incorporated herein by reference in their entirety.
1. Field of the Invention
The present invention relates to semiconductor packaging techniques and, more particularly, to a semiconductor chip package and a method of manufacturing the same.
2. Description of the Related Art
The trend in the electronics industry is toward producing lighter, thinner, faster, and more reliable multi-functional, high quality devices. A ball grid array (BGA) package has been introduced as one way of meeting these demands.
There are several ways to mount a BGA package on a board. When connection terminals such as solder balls are used, poor adhesion between the semiconductor chip package and the board has been a problem. Improvement in the reliability of these solder joints between the semiconductor chip package and the board is therefore desired.
Several methods have been proposed as ways to improve the reliability of solder joints. In one method, dummy balls are formed along the exterior of the solder balls. In another approach, the size of solder balls or the shape of photo solder resist (PSR) is controlled. And in another method, the material of solder balls is changed. Yet another method is used in a conventional BGA package, as described below.
FIG. 1 is a cross-sectional view of a conventional BGA package 100. FIG. 2 is a plan view of the bottom surface of a substrate 20 of the conventional BGA package 100 of FIG. 1. FIG. 3 is an enlarged cross-sectional view of an area xe2x80x9cAxe2x80x9d of the BGA package 100 of FIG. 1. Referring to FIGS. 1 through 3, in the conventional BGA package 100, a semiconductor chip 10 is mounted on the top surface of the substrate 20. Bonding pads 12 of the semiconductor chip 10 are connected to metal wirings (not shown) of the substrate 20 via connectors 30 such as bonding wires. The semiconductor chip 10 and the electrical connection parts including the connectors 30 are encapsulated with a molding resin such as an epoxy molding compound (EMC), thereby forming a package body 40. Ball pads 24 are formed on the bottom surface of the substrate 20 and correspond to the metal wirings (not shown) of the substrate 20. The ball pads 24 are exposed from a photo solder resist (PSR) layer 22. A connection terminal 60 such as a solder ball is formed on each ball pad 24. The above-described package 100 is mounted on a board 50. The board 50 comprises ball lands 54 corresponding to the ball pads 24 and the connection terminals 60.
As shown in FIG. 3, the ball pads 24 of the package 100 are electrically connected to the ball lands 54 of the board 50 via the connection terminals 60. The connections of the connection terminals 60 to the ball pads 24 or to the ball lands 54 significantly affect the reliability of the package mounting. Since the above-described conventional BGA package 100 is mounted on the board by adhering the solder balls therebetween, the reliability of the package mounting is directly affected by the reliability of the solder joint of the connection terminals to the ball pads or to the ball lands.
As the size of the solder ball has become drastically reduced, the mounting height of the package on the board has also been reduced. This can result in cracks in the joints between the package and the board. In particular, among a group of solder balls arranged in a lattice shape, cracks occur more easily on the outermost solder balls. Furthermore, cracks occur most frequently along the long sides. Most of these cracks are caused by differences in the coefficients of thermal expansion.
Specifically, there is often a difference in the coefficients of thermal expansion between the solder balls and the ball pads or between the solder balls and the ball lands. Therefore, when the semiconductor chip package is tested under a temperature cycling (T/C) test, cracks occur in the joints between the solder balls and the ball pads or in the joints between the solder balls and the ball lands. Because cracks occur mainly in the joints between the solder balls and the substrate of the package, the industry would be greatly benefited by a method and structure that provides an improved joint force between the outermost solder balls and the ball pads of the substrate.
Accordingly, the present invention provides a semiconductor chip package configured to prevent cracks from forming between external connection terminals such as solder balls and ball pads.
Also, the present invention improves the solder joint reliability of a semiconductor chip package on a board by reducing the likelihood that its outermost solder balls will be damaged.
Accordingly, a substrate for forming a ball grid array (BGA) package comprises: a substrate having a top surface and a bottom surface having ball pads, and a plurality of enhanced pads formed on the bottom surface of the substrate. Each of the enhanced pads includes one or more dummy pads coupled to one or more dummy patterns.
According to another embodiment of the present invention, a semiconductor chip package comprises a substrate having a top surface for mounting a semiconductor chip thereon and a bottom surface having ball pads. A plurality of enhanced pads are formed on the bottom surface of the substrate. Each of the enhanced pads includes one or more dummy pads coupled to one or more dummy patterns. External connection terminals such as solder balls are formed on the ball pads. A molding resin encapsulates the semiconductor chip.
The ball pads are preferably arranged in a lattice shape on the bottom surface of the substrate. The enhanced pads are formed on outer edges of the ball pad lattice. The enhanced pads preferably comprise first, second, and third enhanced pads. Each of the first enhanced pads may comprise one ball pad, two dummy pads, and dummy patterns for connecting the ball pad to the dummy pads. Each of the second enhanced pads may comprise one ball pad, one dummy pad, and a dummy pattern for connecting the ball pad to the dummy pad. Each of the third enhanced pads may comprise two dummy pads and a dummy pattern for connecting the dummy pads to each other.